1. Field of the Invention
The invention relates to analog-to-digital converters, and more particularly to gain error estimation of analog-to-digital converters.
2. Description of the Related Art
Referring to FIG. 1, a block diagram of a pipelined analog-to-digital converter (ADC) 100 is shown. The pipelined ADC 100 converts an analog input signal Vin from analog to digital to obtain a digital conversion value Dout as an output thereof. The pipelined ADC 100 comprises M stages 101˜10M connected in series and a gain error estimation module 110. The first stage 101 derives a digital output value do1 from the analog input signal Vin and generates a residual signal R1 indicating a difference between the analog input signal Vin and the digital output value do1. The stages 102˜10M then receive residual signals R1˜RM-1 of prior stages 101˜10(M−1) thereof as input signals and respectively derive digital output values do1˜doM from the input signals thereof. Accordingly, the stages 102˜110(M−1) also generate residual signals R2˜RM-1 indicating differences between the input signals R1˜RM-2 thereof and the digital output values do1˜do(M-1) thereof. The gain error estimation module 110 then calculates the digital conversion value Dout according to the digital output values do1˜doM of the stages 101˜10N as the output signal of the pipelined ADC 100.
Before a residual signal of a current stage is output to a subsequent stage as an input, the residual signal is amplified with an amplifier according to a predetermined gain of the current stage. Referring to FIG. 2A, a block diagram of a k-th stage 200 is shown. The k-th stage 200 comprises a sub analog-to-digital converter 202, a sub digital-to-analog converter 204, a summing stage 206, and an amplifier 208. The sub ADC 202 first converts a residual signal Rk-1 of a (k−1)-th stage prior to the k-th stage 200 from analog to digital to obtain a digital output value dok. The sub DAC 204 then converts the digital output value dok from digital back to analog to obtain a signal Xk. The summing stage 206 then subtracts the signal Xk from the residual signal Rk-1 to obtain a signal Yk, representing a difference between the input signal Rk-1 and the digital output value dok. The amplifier 208 then amplifies the signal Yk according to a predetermined gain G to obtain a residual signal Rk of the current stage 200.
Although in the methodology, the predetermined gain G is presumed constant, the actual gain of the amplifier 208 deviates from the predetermined gain G with temperature changes and circuit manufacturing variations. The difference between the actual gain and the predetermined gain is referred to as a gain error of a stage. When the actual gain of the current stage deviates from the predetermined gain, a gain error occurs, and the residual signal output by the current stage has an amplitude error, which induces errors in digital output values of subsequent stages. The gain error estimation module 110 therefore must estimate a gain error and calibrate the digital conversion value Dout according to the gain error. Otherwise, accuracy and resolution of the digital conversion value Dout decreases.
In FIG. 1, the gain error estimation module 110 applies a series of correction numbers S to the first stage 101 for estimation of the gain error of the first stage 101. Referring to FIG. 2B, a block diagram of a target stage 250 for gain error estimation is shown. In addition to a sub ADC 252, a sub DAC 254, a summing stage 256, and an amplifier 258, the target stage 250 further includes an adder 252 adding a correction number S and a stage output value d01 to obtain a signal Z1. The sub DAC 254 then converts the signal Z1 from digital to analog to obtain a signal X1, the summing stage 256 then subtracts the signal X1 from the input signal Vin to obtain a signal Y1, and the amplifier 258 amplifies the signal Y1 to obtain a residual signal R1 of the target stage 250. Therefore, the residual signal R1 and digital output values do2˜doM of the subsequent stages 102˜10N of the target stage 101 also change with the correction number S.
As the digital output values do2˜doM change with the correction number S, the gain error estimation module 110 estimates a gain error of the target stage 101 according to the digital output values do2˜doM and the correction number S. In reference to FIG. 1 and FIG. 2B, the following equation (1) is given:(Vin−do1−s)GM−1(1+ε)=do2GM−2+do3GM−3+Λ+do(M−1)G+doM;  (1)wherein Vin is the input signal of the target stage 101, G is predetermined gains of stages 101˜10M, M is a number of stages, s is the correction number applied to the target stage, and ε is a gain error of the target stage 101. Meanwhile, equation (2) is derived from equation (1) as follows:Vin+ε·Vin−ε·do1−ε·s=(do1+s)+do2G−1+d o3G−2+Λ+doMG−(M−1).  (2)
If equation (2) is divided by the correction number 5 and averaged over N samples, the following equation (3) is obtained:
                                                                        -                ɛ                            =                                                1                  N                                ⁢                                                      ∑                                          n                      =                      1                                        N                                    ⁢                                                                                                                                                                                                        d                                                                  o                                  ⁢                                                                                                                                          ⁢                                  1                                                                                            ⁡                                                              [                                n                                ]                                                                                      +                                                          s                              ⁡                                                              [                                n                                ]                                                                                      +                                                                                                                            d                                                                      o                                    ⁢                                                                                                                                                  ⁢                                    2                                                                                                  ⁡                                                                  [                                  n                                  ]                                                                                            ·                                                              G                                                                  -                                  1                                                                                                                      +                                                                                                                                                                                                                                                                            d                                                                      o                                    ⁢                                                                                                                                                  ⁢                                    3                                                                                                  ⁡                                                                  [                                  n                                  ]                                                                                            ·                                                              G                                                                  -                                  2                                                                                                                      +                            Λ                            +                                                                                                                            d                                  oM                                                                ⁡                                                                  [                                  n                                  ]                                                                                            ·                                                              G                                                                  -                                                                      (                                                                          M                                      -                                      1                                                                        )                                                                                                                                                                                                                                                                  s                      ⁡                                              [                        n                        ]                                                                                                                                                                    =                                                1                  N                                ⁢                                                      ∑                                          n                      =                      1                                        N                                    ⁢                                                            u                      ⁡                                              [                        n                        ]                                                                                    s                      ⁡                                              [                        n                        ]                                                                                                                                                                    =                                                1                  N                                ⁢                                                      ∑                                          n                      =                      1                                        N                                    ⁢                                      v                    ⁡                                          [                      n                      ]                                                                                                                              (        3        )            
The gain error estimation module 110 can average a large amount of gain error estimates v[n] to obtain the gain error ε of the target stage 101 according to the equation (3) as
      1    N    ⁢            ∑              n        =        1            N        ⁢                            V                      i            ⁢                                                  ⁢            n                                    s          ⁡                      [            n            ]                              ⁢                          ⁢      and      ⁢                          ⁢              1        N            ⁢                        ∑                      n            =            1                    N                ⁢                                            d                              o                ⁢                                                                  ⁢                1                                      ⁡                          [              n              ]                                            s            ⁡                          [              n              ]                                          are equal to zero when the number N of samples is large enough.
Thus, according to equation (3), the gain error estimation module 110 first calculates gain error estimates v[n] corresponding to each sample index n and then averages a large amount of gain error estimates v[n] to obtain a gain error of the target stage 101. To increase the effective number of bits (ENOB) of the digital conversion value Dout, the number N of the averaged gain error estimates v[n] must be large enough for the resolution of the gain error ε to remain higher than a tolerable threshold. The gain error estimation module 110 therefore requires a large amount of memory space to store the gain error estimates v[n].
Referring to FIG. 3, a block diagram of a portion of a conventional gain error estimation module 300 of a pipelined ADC is shown. The conventional gain error estimation module 300 comprises a correlation module 302, an accumulation module 304, and an estimate error module 306. To estimate a gain error of a target stage of the pipelined ADC, the gain error estimation module 300 first derives a series of calculation values u[n] according to digital output values of the stages of the pipelined ADC according to the following algorithm:u[n]=do1[n]+s[n]+do2[n]×G−1+do3[n]×G−2+Λ+d oM[n]×G−(M−1);  (4)wherein n is a sample index, s[n] is the correction number, M is equal to a number of the stages, G is a predetermined gain of the stages, do1[n] is a digital output value of the target stage, and do2[n], do3[n], . . . , doM[n] are digital output values of the stages subsequent to the target stage.
The correlation module 302 then correlates a series of correction numbers s[n] applied to the target stage with the series of calculation values u[n] according to the following algorithm to generate a series of gain error estimates v[n] corresponding to sample indexes n:
                                          v            ⁡                          [              n              ]                                =                                    u              ⁡                              [                n                ]                                                    s              ⁡                              [                n                ]                                                    ;                            (        5        )            wherein n is a sample index.
The accumulation module 304 then accumulates a number N of the gain error estimates v[n] generated by the correlation module 302 to obtain a series of accumulation values. The estimate error module 306 then divides the accumulation values by the number N to obtain a series of gain error values ε of the target stage. Thus, the gain error values ε are equal to averages of the series of gain error estimates v[n]. Specifically, the accumulation module 304 and the estimate error module 306 generates the gain error values ε according to the following equation:
                              ɛ          =                                    1              N                        ⁢                                          ∑                                  n                  =                  1                                N                            ⁢                              v                ⁡                                  [                  n                  ]                                                                    ;                            (        6        )            wherein N is the number of gain error estimates being averaged.
The conventional gain error estimation module 300, however, requires a large amount of memory space to store the gain error estimates v[n] being averaged, because the number N in equation (6) must be a very large number according to equation (3). For example, generation of a gain error value ε requires an average of 220 gain error estimates v[n], which requires 220 memory cells. The required memory space increases hardware costs of the pipelined ADC comprising the gain error estimation module 300. The large amount of memory space occupied by the gain error estimates v[n], however, increases costs of the pipelined ADC 100. Thus, a method for gain error estimation for an analog-to-digital converter with reduced memory space requirement is desired.